Voltage controlled current source

Design

I needed a voltage controlled current source (VCCS) to test some current limiting devices. A friend who knows far more than I about analog electronics recommended using a power op-amp, which is an op-amp capable of outputting a high current. I didn’t have one of these to hand, so used a regular low power op-amp to drive the gate of an N-type MOSFET. I think that a power op-amp is just a regular op-amp with some meaty FETs inside and a package capable of disappating more heat than a regular puny op-amp. I use the word puny having watched too much Electroboom on YouTube.

Please see a screen shot of the simulation of the circuit I ran using the falstad circuit simulator. The code for this simulation can be found at the end of this post. The op-amp needs a +15V positive voltage and to be grounded on the negative rail to enable about a 580mA current through the FET, from the +5V rail connected to the drain of the FET.

Using Falstad to simulate the VCCS circuit.

How does it work

The FET source follows the voltage applied to the positive input to the op-amp, providing among other things that there is enough voltage supplied to the positive supply of the op-amp. So the current flowing through the device under test will be V/R, where V is the +5V rail in this example and R is 8 Ohm in this example. Well, 8.2 Ohm if the part under test (PUT) has a resistance of 200 mOhm as shown in the simulation above.

Assembly

I used an lm324 op-amp and a buz73 FET as I had these on hand. I lashed it up on some breadboard. I’m not testing at high frequency, so the bread board was suitable. The completed circuit can be seen in the photo below.

VCCS circuit, testing some polyfuses.

I used a Hameg PSU that was in the lab to power both the op-amp and to supply the +5V rail to the FET drain. I used my Analog Discovery 2 to ‘scope the output and to generate the input for the positive input to the op-amp.

VCCS circuit connected to an Analog Discovery 2 function generator and oscilloscope and a fancy power supply.

Results

The current through the PUT, which I measured with my rinky dinky shiney new FLIR DM66 was as expected. It topped out at about 580mA due to the limitations of the design and components. This was all the current that I needed. I applied a 0-5V ramp over 5 seconds to the positive supply of the op-amp and measured the voltage over the 8 Ohm load resistor to see how the PUT behaved. Overall, it seemed to work as designed. Nobody is more surprised than I am!

One example is shown below where a 0-5V signal was applied to the positive input to the op-amp over 5 seconds and the result ‘scoped over the 8 Ohm resistor for an fpf2123 current limiter IC. We can see that the IC does not turn on for a voltage below about 1.7V. Once the current goes too high, it turns off. But it turns on again every 160ms for 10ms. This is all as it should be according to the data sheet. With this circuit I was able to check the current at which it turned off.

Voltage across 8Ohm load resistor when a 0-5V input is swept across a fpf2123 current limiter IC.

Falstad code

As promised at the start of the post, here’s the code you can cut and paste into the falstad circuit simulator to play with the design.

$ 1 0.000005 10.20027730826997 69 5 50
r 272 112 384 112 0 10000
w 272 112 272 160 0
a 272 176 384 176 8 15 0 1000000 2.89985920119757 2.9 100000
f 480 176 528 176 32 1.5 0.02
w 480 112 576 112 0
w 576 112 576 224 0
w 576 224 528 224 0
w 528 224 528 192 0
g 528 448 528 480 0
r 528 320 528 368 0 8
w 528 320 528 304 0
r 400 176 464 176 0 100
w 384 176 400 176 0
w 464 176 480 176 0
w 480 112 384 112 0
172 176 192 176 256 0 7 2.9 5 0 0 0.5 Voltage
w 176 192 272 192 0
172 528 16 448 16 0 7 5 5 0 0 0.5 Voltage
w 528 16 528 160 0
370 528 384 528 432 1 0
w 528 368 528 384 0
w 528 432 528 448 0
r 528 224 528 304 0 0.2
x 356 269 510 272 4 24 part\sunder\stest

Checking the resonant frequency of a piezoelectric crystal

Having failed to get a tactile response from a small piezoelectric crystal, I wanted to check that I was hitting it with the correct driving frequency. This is the frequency that makes the crystal resonate. I found a test circuit and method on this website. The schematic for the testing circuit shown below is copied from that website.

 

Piezoelectric circuit resonance frequency testing circuit from https://www.americanpiezo.com/knowledge-center/piezo-theory/determining-resonance-frequency.html

I breadboarded the circuit and used my Digilent Analog Discovery 2 as a network analyser to check on the resonant frequency. What does a network analyser do? This inputs sine waves with a range of frequencies across R1 and ground. R1 and R2 create a restor bridge, with the piezoelectric crystal (the ‘ceramic element’ in the diagram above) in parallel with R2. The output from the piezo crystal in series with resistor R3 measured for each of the input frequencies. The magnitude of the output and input waveforms and their phase difference is plotted by the network analyser module. This tool is often used with filters to characterise their behaviour. In this case I wanted to see if the output of the test circuit changed at what should be the resonant frequency of the crystal – quoted as 40 kHz by the manufacturer.

A photo of the testing circuit is shown below. This implements the schematic shown above. I used 100 Ohm resistors for R1 and R2 and a 120 Ohm resistor for R3. I did not implement R4 – the variable resistor as I am not looking to measure the equivalent resistance of the piezoelectric crystal at resonance. I am just verifying what the resonant frequency of the crystal is. The bread board circuit has the input on the right and the output on the left of the photo. Two crysals are soldered on to the green circuit board. I tested both and got similar results.

Piezoelectric crystal frequency response testing circuit

The input and output leads for the network analyser can be seen connected to the board. The test signal is input using the yellow lead on the right. The orange lead is oscilloscope channel 1 which measures the input signal. The blue lead in the middle is the second oscilloscope channel, which is used to measure the relative amplitude and phase of the output signal relative to the input signal. The three wires on the left of the photo are all connected to the circuit ground.

The output from the network analyser can be seen in the screen grab below. The amplitude of the output channel is the blue line in the top half of the screen and the phase relative to the input signal is shown in the bottom half.

Network analyser output, red cursor at 40 kHz, top amplitude, bottom phase.

We can see a hump, which using the horizontal cursor (the vertical red line) I can measure is pretty much at 40 kHz. Now you might say the hump looks small. It is roughly 10 dB in height, which is a factor of 3 in amplitude. The phase is all over the place. Naturally, I wanted to ‘scope the input signal to see what the network analyser was doing. As I was out of ‘scope channels on the Discovery 2, I hooked up a Tektronic TBS1104 ‘scope. I can see that the input signal is a sine wave. As the network analyser ramps up the input frequency, I can see the sine wave also increasing in frequency. Kind of like watching a spring compress.

The full testing rig can be seen below. The ‘scope on the left shows the input signal – a smooth sine wave. The board with the crystals is on the bottom edge of the photo at the left. You can never have too many wires on your desk.

Piezo crystal testing arrangement.

The Discovery 2 claims a resolution of 0.32mV. The input to the circuit from the network analsyser is 8 V peak to peak.

8/0.32×10-3 = 25,000 = 87.9 dB

So the amplitude measurements of -56 dB to -80 dB are within the Discovery 2’s stated resolution.

To be more thorough, I could use the amplifying circuit I designed in https://www.seismicmatt.com/200v-piezo-crystal-driver/ to generate an input of >100 V to the crystal, which should give me better resolution as the output signal would also be much higher. However, life is short and I’ve sunk enough time in this project. I was hitting the crystal with the correct signal. I just couldn’t make it vibrate enough to be tactile.

200V piezo crystal driver

Spoiler alert: I got the driving circuitry to behave as planned, but I could not feel the crystal vibrate.

The idea is to use the tiny crystals used in piezoelectric motors to create an array of dots that can be made to vibrate under the area of a finger tip. This will be used to create a tactile display that can be felt. The initial aim would be an array of these crystals under an area the size of your fingertip. This would enable things like a Braille or Moon display that can be felt under your finger and that updates real time.

These crystals are designed to resonate at around 40 kHz. Now, you won’t feel something vibrating at this high a frequency. Your touch is sensitive to vibrations of around 10-100 Hz. So the crystals need to be driven with a frequency of around 40 kHz, which is then switched on and off (modulated in engineering speak) at around 30 Hz. All of this with a voltage amplitude of around 100 V RMS (200 V peak to peak for a square wave). How hard could that be? Errrr….

Well, I built a 100 V power supply in another post here. However, I used some Rohde & Schwarz HMP4040 adjustable power supplies I found in the lab as I could get over 200V by daisy chaining the outputs in serial. I read the supply’s manual online to check that the outputs could be connected like this safely. I ended up with around a 220 V peak to peak waves, modulated at around 30 Hz.

How to create a 40-42 kHz output signal which is then switched on and off at about 30-50 Hz? I used an N-channel MOSFET (FET) to switch a low voltage signal, with the gate of the transistor operated by an operational amplifier (op amp). The op amp input comes from an external microcontroller. I thought of lashing something up to create this input using a BBC micro:bit. Then I hosed money at the problem until it went away and bought an Analog Discovery 2 gizmo with a built in waveform generator. The software for the Analog Discovery allows for signals to be modulated, so I could easily create got the driving signal I was after. There are a range of YouTube videos to get you started with the Analog Discovery 2.

Top tip. Run the Analog Discovery from a laptop and disconnect the laptop from the mains when connecting the Analog Discovery 2 to your circuit. I measured the potential difference between the ground on the Analog Discovery 2 and my circuit and it was around 0.06V with the laptop connected to mains power. When running on battery, the potential difference was a magnitude lower. This means there is less chance of a ‘ground loop’ cooking off your laptop when you connect the ground of the Analog Discover 2 waveform generator to the ground of your circuit board.

I simulated the circuit using the Falstad and ltspice simulators. Simulate twice, build once as my Grandma used to say. I tried the qucs simulator as well, but could not get it to ‘converge’ with my design. Probably something I’m doing wrong.

Falstad is not as accurate as ltspice but is more interactive. Falstad runs through the browser. I found a downloadable version of Falstad called Circuit Simulator here, which seems to load the CPU less than running the browser version. I’m grateful for the all of the simulators being made available for us to use for free.

A screen grab from Falstad/Circuit Simulator can be seen below. I use a CA3140 CMOS op-amp as I found a few of them in the lab and they are fit for purpose. The FET is a 450V rated N-channel SSN1N45B (farnell p/n 2454128). This FET can handle the voltage that I need to use and can be switched on and off with a reasonably low voltage swing to the gate.

Falstad simulation of the piezo driver. The piezo crystal is represented by the 20F capacitor.

An example ‘scope grab from a Tektronix TBS1104 is shown below. The dense bursts of signal are the 40kHz driver, the larger gaps show that this is being switched on and off at around 30Hz. The orange trace is the signal from the Analog Discovery 2 board used as the input to the non-inverting port of the op-amp. The output from this op-amp switches the FET on and off. The green trace is the voltage at the high side of the piezo crystal. In this display, the driving voltage is 212V peak to peak, which is 106V RMS for a square wave. The signal frequency on the ‘scope is shown as 6.250kHz, with a question mark, as the modulation of the 40kHz with the 30Hz signal confuses the ‘scope’s frequency measurement.

piezo driver signal, 40kHz moudulated at 30Hz

The ‘scope grab below shows a close up of the gate driver where I try 41kHz as driving frequency for the piezo crystal. We can see that the FET gate is being driven with a 7.6V peak to peak square wave, which enables the 226V high voltage rail to be switched to generate the piezo driver signal. I tried a few frequencies to try and get the crystal to resonate. The gate of the FET needs around 7.5V peak to peak to ‘open’ the FET enough for the full 226V to switch through it. With a lower high voltage supply, a lower FET gate voltage is needed. I spent a few years trying to study physics, so did at one time have a good understanding of all the semiconductor shenanigans that go on inside the transistor. That was a long time ago.

We can see that when the FET gate goes high, the piezo driving voltage goes low. This is as the FET is opened by the gate going high, which connects the drain to source to ground through the 300Ohm resistor. This pulls the voltage low. When the gate signal is low, the FET is closed, so the high voltage rail is measured at the piezo crystal.

piezo driving signal, 41kHz

I messed around with some transformers with limited result. I could wind one of my own, but would rather use something off the shelf. I tried a few from coilcraft but without success. You need to be careful with transformers, as their impedance changes with frequency, meaning you can end up putting more current through them than their windings are designed for if you’re not careful, as shown by the imitable Electroboom.